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Title page for ETD etd-04152005-165734


Type of Document Dissertation
Author Nimbalker, Ajit
Author's Email Address animbalk@nd.edu
URN etd-04152005-165734
Title Design of High Throughput Low Complexity Turbo Codes
Degree Doctor of Philosophy
Department Electrical Engineering
Advisory Committee
Advisor Name Title
Frederico Xavier Committee Chair
Daniel J. Costello Committee Member
Martin Haenggi Committee Member
Nicholas Laneman Committee Member
Thomas E. Fuja Committee Member
Keywords
  • turbo code
  • high throughput decoding
  • interleaver
  • parallel memory access
  • multiple turbo code
Date of Defense 2005-04-04
Availability restricted
Abstract
Turbo codes are powerful error-correcting codes that are already part of several wireless technologies. Advanced low complexity turbo coding

solutions are necessary for next generation systems that will have peak data rates in excess of 100 Mbps. In a high throughput turbo decoder, a

significant hardware problem arises due to the interleaver present in the turbo code. This dissertation analyzes contention-free interleavers that avoid this problem by incorporating the hardware constraints into the interleaver description. It is shown that the fraction of interleavers that are contention-free is small. In spite of this seemingly tight constraint, contention-free inter-window shuffle (IWS) interleavers are designed for the eight-state encoder of the 3GPP turbo code, with performance identical to that of the 3GPP interleavers. Since IWS interleavers have a very low complexity implementation, several block sizes are supportable without incurring a storage penalty.

A multiple turbo code (MTC) that consists of a parallel concatenation of four two-state component encoders is also investigated. Due to the reduced number of states, the MTC supports larger block sizes than the eight-state 3GPP turbo code with the same decoder hardware. First, using EXIT chart analysis, puncturing patterns for code rates ranging from 1/4 to 3/4 are found. Next, IWS interleavers to facilitate high throughput decoding are designed based on a summary distance approach. Simulation results indicate that the MTC

has a better error floor performance than the 3GPP turbo code. A fixed point model for the decoder is obtained using simulation and analytical methods.

A technique to resolve a hardware re-use problem in the decoders is proposed, which leads to a further reduction in complexity. Using computational complexity comparisons, it is shown that the MTC can support four times the block length supported by the 3GPP turbo code. A fair comparison framework is adopted to compare the two codes for equal throughput/complexity, and it is shown that the MTC outperforms the 3GPP turbo code. Therefore, the MTC is proposed as an advanced solution for next generation wireless systems.

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